A hardware implementation circuit of pipelined SHA256 based on data storage
A new method to realize full-pipelined SHA256 based on data storage is proposed. For the full-pipelined SHA256, only A and E need to be calculated each time when the status registers of the data compressor are updated, while B-D and F-H can be obtained directly from A-C and E-G of the previous round...
| Main Authors: | , , , , , , |
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| Format: | Article |
| Language: | zho |
| Published: |
National Computer System Engineering Research Institute of China
2019-07-01
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| Series: | Dianzi Jishu Yingyong |
| Subjects: | |
| Online Access: | http://www.chinaaet.com/article/3000105993 |