An improved asymmetrical multi‐level inverter topology with boosted output voltage and reduced components count

Abstract This paper presents an improved Multi‐level Inverter topology utilizing the concept of boosting‐capacitor and two DC sources with reduced switches count for generating 17‐level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other...

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Bibliographic Details
Main Authors: M Saad Bin Arif, Uvais Mustafa, Marif Daula Siddique, Shahbaz Ahmad, Atif Iqbal, Ratil Hasnat Ashique, Shahrin bin Ayob
Format: Article
Language:English
Published: Wiley 2021-09-01
Series:IET Power Electronics
Subjects:
Online Access:https://doi.org/10.1049/pel2.12119