Multi-Channel Gating Chip in 0.18 µm High-Voltage CMOS for Quantum Applications

A gating circuit for a photonic quantum simulator is introduced. The gating circuit uses a large excess bias voltage of up to 9.9 V and an integrated single-photon avalanche diode (SPAD). Nine channels are monolithically implemented in an application-specific integrated circuit (ASIC) including nine...

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Bibliographic Details
Main Authors: Christoph Ribisch, Michael Hofbauer, Seyed Saman Kohneh Poushi, Alexander Zimmer, Kerstin Schneider-Hornstein, Bernhard Goll, Horst Zimmermann
Format: Article
Language:English
Published: MDPI AG 2023-12-01
Series:Sensors
Subjects:
Online Access:https://www.mdpi.com/1424-8220/23/24/9644