Mathematical Modeling of Drain Current Estimation in a CSDG MOSFET, Based on La<sub>2</sub>O<sub>3</sub> Oxide Layer with Fabrication—A Nanomaterial Approach

In this work, three-dimensional modeling of the surface potential along the cylindrical surrounding double-gate (CSDG) MOSFET is proposed. The derived surface potential is used to predict the values of electron mobility along the length of the device, thereby deriving the drain current equation at t...

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Bibliographic Details
Main Authors: Naveenbalaji Gowthaman, Viranjay M. Srivastava
Format: Article
Language:English
Published: MDPI AG 2022-09-01
Series:Nanomaterials
Subjects:
Online Access:https://www.mdpi.com/2079-4991/12/19/3374
Description
Summary:In this work, three-dimensional modeling of the surface potential along the cylindrical surrounding double-gate (CSDG) MOSFET is proposed. The derived surface potential is used to predict the values of electron mobility along the length of the device, thereby deriving the drain current equation at the end of the device. The expressions are used for modeling the symmetric doped and undoped channel CSDG MOSFET device. This model uses Pao-Sah’s double integral to derive the current equation for the concentric cylindrical structure of the CSDG MOSFET. The three-dimensional surface potential estimation is performed analytically for doped and undoped device parameters. The maximum oxidant concentration of the oxide layer is observed to be 4.37 × 10<sup>16</sup> cm<sup>−3</sup> of the thickness of 0.82 nm for (100) and 3.90 × 10<sup>16</sup> cm<sup>−3</sup> of the thickness of 0.96 nm for (111) for dry oxidation, and 2.56 × 10<sup>19</sup> cm<sup>−3</sup> of thickness 0.33 nm for (100) and 2.11 × 10<sup>19</sup> cm<sup>−3</sup> of thickness 0.49 nm for (111) for wet oxidation environment conditions. Being an extensive analytical approach, the drain current serves the purpose of electron concentration explicitly inside the concentric cylindrical structures. The behavior of the device is analyzed for various threshold conditions of the gate voltage and other parameters.
ISSN:2079-4991