CMOS X‐band pole‐converging triple‐cascode LNA with low‐noise and wideband performance

Abstract A pole‐converging X‐band low‐noise amplifier (LNA) using 130 nm CMOS technology is proposed. An on‐chip pole‐converging capacitor CPC is added between the gate and drain node of the common‐gate (CG) stage. The capacitor CPC combines with a noise‐reducing inductor L1 to converge poles into t...

詳細記述

書誌詳細
主要な著者: Cheng Cao, Yubing Li, Zhe Wang, Zemeng Huang, Tao Tan, Deyang Chen, Xiuping Li
フォーマット: 論文
言語:English
出版事項: Hindawi-IET 2022-01-01
シリーズ:IET Circuits, Devices and Systems
主題:
オンライン・アクセス:https://doi.org/10.1049/cds2.12081

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