Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding
Three-dimensional integration technology provides a promising total solution that can be used to achieve system-level integration with high function density and low cost. In this study, a wafer-level 3D integration technology using PDAP as an intermediate bonding polymer was applied effectively for...
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| Format: | Article |
| Language: | English |
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MDPI AG
2021-12-01
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| Series: | Micromachines |
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| Online Access: | https://www.mdpi.com/2072-666X/12/12/1586 |
| _version_ | 1797502376223965184 |
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| author | Zhong Fang Peng You Yijie Jia Xuchao Pan Yunlei Shi Junjie Jiao Yong He |
| author_facet | Zhong Fang Peng You Yijie Jia Xuchao Pan Yunlei Shi Junjie Jiao Yong He |
| author_sort | Zhong Fang |
| collection | DOAJ |
| description | Three-dimensional integration technology provides a promising total solution that can be used to achieve system-level integration with high function density and low cost. In this study, a wafer-level 3D integration technology using PDAP as an intermediate bonding polymer was applied effectively for integration with an SOI wafer and dummy a CMOS wafer. The influences of the procedure parameters on the adhesive bonding effects were determined by Si–Glass adhesive bonding tests. It was found that the bonding pressure, pre-curing conditions, spin coating conditions, and cleanliness have a significant influence on the bonding results. The optimal procedure parameters for PDAP adhesive bonding were obtained through analysis and comparison. The 3D integration tests were conducted according to these optimal parameters. In the tests, process optimization was focused on Si handle-layer etching, PDAP layer etching, and Au pillar electroplating. After that, the optimal process conditions for the 3D integration process were achieved. The 3D integration applications of the micro-bolometer array and the micro-bridge resistor array were presented. It was confirmed that 3D integration based on PDAP adhesive bonding is suitable for the fabrication of system-on-chip when using MEMS and IC integration and that it is especially useful for the fabrication of low-cost suspended-microstructure on-CMOS-chip systems. |
| first_indexed | 2024-03-10T03:32:12Z |
| format | Article |
| id | doaj.art-4958145bc65a47f3927dae9a2767bdd3 |
| institution | Directory Open Access Journal |
| issn | 2072-666X |
| language | English |
| last_indexed | 2024-03-10T03:32:12Z |
| publishDate | 2021-12-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj.art-4958145bc65a47f3927dae9a2767bdd32023-11-23T09:37:24ZengMDPI AGMicromachines2072-666X2021-12-011212158610.3390/mi12121586Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive BondingZhong Fang0Peng You1Yijie Jia2Xuchao Pan3Yunlei Shi4Junjie Jiao5Yong He6School of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, ChinaSchool of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, ChinaNo. 208 Research Institute of China Ordnance Industries, Beijing 102202, ChinaSchool of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, ChinaQuality Inspection and Testing Center, China Electronic Product Reliability and Environmental Testing Research Institute, Guangzhou 510610, ChinaSchool of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, ChinaSchool of Mechanical Engineering, Nanjing University of Science and Technology, Nanjing 210094, ChinaThree-dimensional integration technology provides a promising total solution that can be used to achieve system-level integration with high function density and low cost. In this study, a wafer-level 3D integration technology using PDAP as an intermediate bonding polymer was applied effectively for integration with an SOI wafer and dummy a CMOS wafer. The influences of the procedure parameters on the adhesive bonding effects were determined by Si–Glass adhesive bonding tests. It was found that the bonding pressure, pre-curing conditions, spin coating conditions, and cleanliness have a significant influence on the bonding results. The optimal procedure parameters for PDAP adhesive bonding were obtained through analysis and comparison. The 3D integration tests were conducted according to these optimal parameters. In the tests, process optimization was focused on Si handle-layer etching, PDAP layer etching, and Au pillar electroplating. After that, the optimal process conditions for the 3D integration process were achieved. The 3D integration applications of the micro-bolometer array and the micro-bridge resistor array were presented. It was confirmed that 3D integration based on PDAP adhesive bonding is suitable for the fabrication of system-on-chip when using MEMS and IC integration and that it is especially useful for the fabrication of low-cost suspended-microstructure on-CMOS-chip systems.https://www.mdpi.com/2072-666X/12/12/15863D integrationadhesive bondingpoly (diallyl phthalate)SOI waferwafer thinning |
| spellingShingle | Zhong Fang Peng You Yijie Jia Xuchao Pan Yunlei Shi Junjie Jiao Yong He Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding Micromachines 3D integration adhesive bonding poly (diallyl phthalate) SOI wafer wafer thinning |
| title | Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding |
| title_full | Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding |
| title_fullStr | Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding |
| title_full_unstemmed | Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding |
| title_short | Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding |
| title_sort | wafer level 3d integration based on poly diallyl phthalate adhesive bonding |
| topic | 3D integration adhesive bonding poly (diallyl phthalate) SOI wafer wafer thinning |
| url | https://www.mdpi.com/2072-666X/12/12/1586 |
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