Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks
Scan structures, which are widely used in cryptographic circuits for wireless sensor networks applications, are essential for testing very-large-scale integration (VLSI) circuits. Faults in cryptographic circuits can be effectively screened out by improving testability and test coverage using a scan...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2020-08-01
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| Series: | Sensors |
| Subjects: | |
| Online Access: | https://www.mdpi.com/1424-8220/20/17/4771 |
| _version_ | 1797556017017389056 |
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| author | Hyunyul Lim Minho Cheong Sungho Kang |
| author_facet | Hyunyul Lim Minho Cheong Sungho Kang |
| author_sort | Hyunyul Lim |
| collection | DOAJ |
| description | Scan structures, which are widely used in cryptographic circuits for wireless sensor networks applications, are essential for testing very-large-scale integration (VLSI) circuits. Faults in cryptographic circuits can be effectively screened out by improving testability and test coverage using a scan structure. Additionally, scan testing contributes to yield improvement by identifying fault locations. However, faults in circuits cannot be tested when a fault occurs in the scan structure. Moreover, various defects occurring early in the manufacturing process are expressed as faults of scan chains. Therefore, scan-chain diagnosis is crucial. However, it is difficult to obtain a sufficiently high diagnosis resolution and accuracy through the conventional scan-chain diagnosis. Therefore, this article proposes a novel scan-chain diagnosis method using regression and fan-in and fan-out filters that require shorter training and diagnosis times than existing scan-chain diagnoses do. The fan-in and fan-out filters, generated using a circuit logic structure, can highlight important features and remove unnecessary features from raw failure vectors, thereby converting the raw failure vectors to fan-in and fan-out vectors without compromising the diagnosis accuracy. Experimental results confirm that the proposed scan-chain-diagnosis method can efficiently provide higher resolutions and accuracies with shorter training and diagnosis times. |
| first_indexed | 2024-03-10T16:55:45Z |
| format | Article |
| id | doaj.art-49bfb30a904649439a150649b4b16da9 |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-03-10T16:55:45Z |
| publishDate | 2020-08-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-49bfb30a904649439a150649b4b16da92023-11-20T11:08:45ZengMDPI AGSensors1424-82202020-08-012017477110.3390/s20174771Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor NetworksHyunyul Lim0Minho Cheong1Sungho Kang2Electrical and Electronic Engineering Department, Yonsei University, Seoul 03722, KoreaElectrical and Electronic Engineering Department, Yonsei University, Seoul 03722, KoreaElectrical and Electronic Engineering Department, Yonsei University, Seoul 03722, KoreaScan structures, which are widely used in cryptographic circuits for wireless sensor networks applications, are essential for testing very-large-scale integration (VLSI) circuits. Faults in cryptographic circuits can be effectively screened out by improving testability and test coverage using a scan structure. Additionally, scan testing contributes to yield improvement by identifying fault locations. However, faults in circuits cannot be tested when a fault occurs in the scan structure. Moreover, various defects occurring early in the manufacturing process are expressed as faults of scan chains. Therefore, scan-chain diagnosis is crucial. However, it is difficult to obtain a sufficiently high diagnosis resolution and accuracy through the conventional scan-chain diagnosis. Therefore, this article proposes a novel scan-chain diagnosis method using regression and fan-in and fan-out filters that require shorter training and diagnosis times than existing scan-chain diagnoses do. The fan-in and fan-out filters, generated using a circuit logic structure, can highlight important features and remove unnecessary features from raw failure vectors, thereby converting the raw failure vectors to fan-in and fan-out vectors without compromising the diagnosis accuracy. Experimental results confirm that the proposed scan-chain-diagnosis method can efficiently provide higher resolutions and accuracies with shorter training and diagnosis times.https://www.mdpi.com/1424-8220/20/17/4771cryptographywireless sensor networksmachine learningscan-chain diagnosis |
| spellingShingle | Hyunyul Lim Minho Cheong Sungho Kang Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks Sensors cryptography wireless sensor networks machine learning scan-chain diagnosis |
| title | Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks |
| title_full | Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks |
| title_fullStr | Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks |
| title_full_unstemmed | Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks |
| title_short | Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks |
| title_sort | scan chain fault diagnosis using regressions in cryptographic chips for wireless sensor networks |
| topic | cryptography wireless sensor networks machine learning scan-chain diagnosis |
| url | https://www.mdpi.com/1424-8220/20/17/4771 |
| work_keys_str_mv | AT hyunyullim scanchainfaultdiagnosisusingregressionsincryptographicchipsforwirelesssensornetworks AT minhocheong scanchainfaultdiagnosisusingregressionsincryptographicchipsforwirelesssensornetworks AT sunghokang scanchainfaultdiagnosisusingregressionsincryptographicchipsforwirelesssensornetworks |