A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is becau...
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2015-03-01
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Series: | Sensors |
Subjects: | |
Online Access: | http://www.mdpi.com/1424-8220/15/3/5081 |