A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier

In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is becau...

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Main Authors: Daehyeok Kim, Jaeyoung Bae, Minkyu Song
Format: Article
Language:English
Published: MDPI AG 2015-03-01
Series:Sensors
Subjects:
Online Access:http://www.mdpi.com/1424-8220/15/3/5081
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author Daehyeok Kim
Jaeyoung Bae
Minkyu Song
author_facet Daehyeok Kim
Jaeyoung Bae
Minkyu Song
author_sort Daehyeok Kim
collection DOAJ
description In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution.
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spelling doaj.art-4c792171b820454398c935393344f7bf2022-12-22T04:22:58ZengMDPI AGSensors1424-82202015-03-011535081509510.3390/s150305081s150305081A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference AmplifierDaehyeok Kim0Jaeyoung Bae1Minkyu Song2Department of Semiconductor Science, Dongguk University, Seoul 100-715, KoreaDepartment of Semiconductor Science, Dongguk University, Seoul 100-715, KoreaDepartment of Semiconductor Science, Dongguk University, Seoul 100-715, KoreaIn order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution.http://www.mdpi.com/1424-8220/15/3/5081CMOS image sensordigital correlated double samplingfixed pattern noisedifferential difference amplifier
spellingShingle Daehyeok Kim
Jaeyoung Bae
Minkyu Song
A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
Sensors
CMOS image sensor
digital correlated double sampling
fixed pattern noise
differential difference amplifier
title A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
title_full A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
title_fullStr A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
title_full_unstemmed A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
title_short A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier
title_sort high speed cmos image sensor with a novel digital correlated double sampling and a differential difference amplifier
topic CMOS image sensor
digital correlated double sampling
fixed pattern noise
differential difference amplifier
url http://www.mdpi.com/1424-8220/15/3/5081
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