BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC
Circuit delays are increasingly sensitive to process, voltage, temperature, and aging (PVTA) variations, severely impacting circuit performance. Accurate measurement of circuit delay is essential. However, the additional hardware structures for measuring circuit delay add to the critical path delay....
| Main Authors: | , , , , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2023-11-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/12/23/4853 |
| _version_ | 1797400247167614976 |
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| author | Danqing Li Huaguo Liang Hong Zhang Yue Wang Maoxiang Yi Yingchun Lu Zhengfeng Huang |
| author_facet | Danqing Li Huaguo Liang Hong Zhang Yue Wang Maoxiang Yi Yingchun Lu Zhengfeng Huang |
| author_sort | Danqing Li |
| collection | DOAJ |
| description | Circuit delays are increasingly sensitive to process, voltage, temperature, and aging (PVTA) variations, severely impacting circuit performance. Accurate measurement of circuit delay is essential. However, the additional hardware structures for measuring circuit delay add to the critical path delay. To address this issue, this paper proposes a bypass-based ring oscillator (BPath-RO) that reduces the impact on the critical path delay by moving the added measurement control structures to the bypass. The proposed measurement scheme requires only two transistors inserted into the critical path, which is more conducive to engineering change order (ECO). Measurement simulation experiments were performed on representative critical paths of the ISCAS’89 s298 and ITC’99 b15 benchmark circuits. The experimental results show that, in comparison with the existing architectures, the Bpath-RO delay measurement scheme improves the circuit performance by an average of 13.81% (s298) and 3.47% (b15) and reduces the hardware overhead by up to 70% for each path. |
| first_indexed | 2024-03-09T01:52:48Z |
| format | Article |
| id | doaj.art-4f3432dbd3fd487491e560e8266a8159 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-09T01:52:48Z |
| publishDate | 2023-11-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-4f3432dbd3fd487491e560e8266a81592023-12-08T15:14:14ZengMDPI AGElectronics2079-92922023-11-011223485310.3390/electronics12234853BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital ICDanqing Li0Huaguo Liang1Hong Zhang2Yue Wang3Maoxiang Yi4Yingchun Lu5Zhengfeng Huang6School of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaSchool of Microelectronics, Hefei University of Technology, Hefei 230601, ChinaCircuit delays are increasingly sensitive to process, voltage, temperature, and aging (PVTA) variations, severely impacting circuit performance. Accurate measurement of circuit delay is essential. However, the additional hardware structures for measuring circuit delay add to the critical path delay. To address this issue, this paper proposes a bypass-based ring oscillator (BPath-RO) that reduces the impact on the critical path delay by moving the added measurement control structures to the bypass. The proposed measurement scheme requires only two transistors inserted into the critical path, which is more conducive to engineering change order (ECO). Measurement simulation experiments were performed on representative critical paths of the ISCAS’89 s298 and ITC’99 b15 benchmark circuits. The experimental results show that, in comparison with the existing architectures, the Bpath-RO delay measurement scheme improves the circuit performance by an average of 13.81% (s298) and 3.47% (b15) and reduces the hardware overhead by up to 70% for each path.https://www.mdpi.com/2079-9292/12/23/4853bypassdelay measurementin situring oscillatorsprocessvoltage |
| spellingShingle | Danqing Li Huaguo Liang Hong Zhang Yue Wang Maoxiang Yi Yingchun Lu Zhengfeng Huang BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC Electronics bypass delay measurement in situ ring oscillators process voltage |
| title | BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC |
| title_full | BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC |
| title_fullStr | BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC |
| title_full_unstemmed | BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC |
| title_short | BPath-RO: A Performance- and Area-Efficient In Situ Delay Measurement Scheme for Digital IC |
| title_sort | bpath ro a performance and area efficient in situ delay measurement scheme for digital ic |
| topic | bypass delay measurement in situ ring oscillators process voltage |
| url | https://www.mdpi.com/2079-9292/12/23/4853 |
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