Dynamically Scalable NoC Architecture for Implementing Run-Time Reconfigurable Applications
The paper proposes two architectures for a dynamically scalable network-on-chip (NoC) for dynamically reconfigurable intellectual properties (IPs) to save power. The first architecture is a run-time scalable column-based NoC, where the columns of the NoC are scaled up and down at run-time depending...
| প্রধান লেখক: | , , , |
|---|---|
| বিন্যাস: | প্রবন্ধ |
| ভাষা: | English |
| প্রকাশিত: |
MDPI AG
2023-10-01
|
| মালা: | Micromachines |
| বিষয়গুলি: | |
| অনলাইন ব্যবহার করুন: | https://www.mdpi.com/2072-666X/14/10/1913 |