Efficient storage method for FPGA-based partially parallel QC-LDPC decoder

Efficient storage method for FPGA-based partially parallel QC-LDPC decoder

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An efficient storage method of hard decisions sharing intrinsic and extrinsic memory banks for partially parallel QC-LDPC decoder was proposed.Extra memory banks for storing hard decisions were avoided in this method,which result in significantly reduced consumption of RAM resources and routed compl...

Täydet tiedot

Bibliografiset tiedot
Päätekijät: Rui-jia YUAN, Bao-ming BAI
Aineistotyyppi: Artikkeli
Kieli:zho
Julkaistu: Editorial Department of Journal on Communications 2012-11-01
Sarja:Tongxin xuebao
Aiheet:
LDPC code
decoder
partially parallel
efficient storage
FPGA implementation
Linkit:http://www.joconline.com.cn/zh/article/doi/10.3969/j.issn.1000-436x.2012.11.021/

Internet

http://www.joconline.com.cn/zh/article/doi/10.3969/j.issn.1000-436x.2012.11.021/

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