Silicon CMOS architecture for a spin-based quantum computer
Realisation of large-scale quantum computation requires both error correction capability and a large number of qubits. Here, the authors propose to use a CMOS-compatible architecture featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes.
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Nature Portfolio
2017-12-01
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| Series: | Nature Communications |
| Online Access: | https://doi.org/10.1038/s41467-017-01905-6 |
| _version_ | 1818343385365217280 |
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| author | M. Veldhorst H. G. J. Eenink C. H. Yang A. S. Dzurak |
| author_facet | M. Veldhorst H. G. J. Eenink C. H. Yang A. S. Dzurak |
| author_sort | M. Veldhorst |
| collection | DOAJ |
| description | Realisation of large-scale quantum computation requires both error correction capability and a large number of qubits. Here, the authors propose to use a CMOS-compatible architecture featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes. |
| first_indexed | 2024-12-13T16:29:45Z |
| format | Article |
| id | doaj.art-53975e69be2e4da4a7d56b8f410a4bf2 |
| institution | Directory Open Access Journal |
| issn | 2041-1723 |
| language | English |
| last_indexed | 2024-12-13T16:29:45Z |
| publishDate | 2017-12-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | Nature Communications |
| spelling | doaj.art-53975e69be2e4da4a7d56b8f410a4bf22022-12-21T23:38:32ZengNature PortfolioNature Communications2041-17232017-12-01811810.1038/s41467-017-01905-6Silicon CMOS architecture for a spin-based quantum computerM. Veldhorst0H. G. J. Eenink1C. H. Yang2A. S. Dzurak3Qutech and Kavli Institute of NanoscienceQutech and Kavli Institute of NanoscienceCentre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South WalesCentre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South WalesRealisation of large-scale quantum computation requires both error correction capability and a large number of qubits. Here, the authors propose to use a CMOS-compatible architecture featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes.https://doi.org/10.1038/s41467-017-01905-6 |
| spellingShingle | M. Veldhorst H. G. J. Eenink C. H. Yang A. S. Dzurak Silicon CMOS architecture for a spin-based quantum computer Nature Communications |
| title | Silicon CMOS architecture for a spin-based quantum computer |
| title_full | Silicon CMOS architecture for a spin-based quantum computer |
| title_fullStr | Silicon CMOS architecture for a spin-based quantum computer |
| title_full_unstemmed | Silicon CMOS architecture for a spin-based quantum computer |
| title_short | Silicon CMOS architecture for a spin-based quantum computer |
| title_sort | silicon cmos architecture for a spin based quantum computer |
| url | https://doi.org/10.1038/s41467-017-01905-6 |
| work_keys_str_mv | AT mveldhorst siliconcmosarchitectureforaspinbasedquantumcomputer AT hgjeenink siliconcmosarchitectureforaspinbasedquantumcomputer AT chyang siliconcmosarchitectureforaspinbasedquantumcomputer AT asdzurak siliconcmosarchitectureforaspinbasedquantumcomputer |