Energy Efficient Self-Adaptive Dual Mode Logic Address Decoder

Energy Efficient Self-Adaptive Dual Mode Logic Address Decoder

This paper presents a 1024-bit self-adaptive memory address decoder based on Dual Mode Logic (DML) design style to allow working in two modes of operation (i.e., dynamic for high-performance and static for energy-saving). The main novelty of this work relies on the design of a controlling mechanism...

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Bibliographic Details
Main Authors: Kevin Vicuña, Cristhopher Mosquera, Ariana Musello, Sara Benedictis, Mateo Rendón, Esteban Garzón, Luis Miguel Prócel, Lionel Trojman, Ramiro Taco
Format: Article
Language:English
Published: MDPI AG 2021-04-01
Series:Electronics
Subjects:
address decoder
controller
Dual Mode Logic
self-adaptive
Online Access:https://www.mdpi.com/2079-9292/10/9/1052

Internet

https://www.mdpi.com/2079-9292/10/9/1052

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