Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection

Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection

This paper describes the design and implementation of a driver drowsiness detection (DDD) system using a modified RiscV processor on a field-programmable gate array (FPGA). To detect drowsiness, Convolutional Neural Network (CNN) is implemented on a RiscV processor. The CNN is trained to classify fo...

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Bibliographic Details
Main Authors: Seyed Kian Mousavikia, Erfan Gholizadehazari, Morteza Mousazadeh, Siddika Berna Ors Yalcin
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Convolutional neural network
driver drowsiness detection
FPGA
hardware implementation
modified RiscV processor
Online Access:https://ieeexplore.ieee.org/document/9781409/

Internet

https://ieeexplore.ieee.org/document/9781409/

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