Improving LUT count of FPGA-based sequential blocks

Improving LUT count of FPGA-based sequential blocks

Very often, a digital system includes sequential blocks which can be represented using a model of the finite state machine (FSM). It is very important to improve such FSM characteristics as the number of used logic elements, operating frequency and consumed energy. The paper proposes a novel technol...

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Bibliographic Details
Main Authors: Alexander Barkalov, Larysa Titarenko, Małgorzata Mazurkiewicz, Kazimierz Krzywicki
Format: Article
Language:English
Published: Polish Academy of Sciences 2021-03-01
Series:Bulletin of the Polish Academy of Sciences: Technical Sciences
Subjects:
fpga
lut
mealy fsm
synthesis
structural decomposition
product terms
partition
Online Access:https://journals.pan.pl/Content/119412/PDF/29_01817_Bpast.No.69(2)_26.04.21_K1_G_TeX_OK.pdf

Internet

https://journals.pan.pl/Content/119412/PDF/29_01817_Bpast.No.69(2)_26.04.21_K1_G_TeX_OK.pdf

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