A Novel Capacitorless 1T DRAM with Embedded Oxide Layer

A Novel Capacitorless 1T DRAM with Embedded Oxide Layer

A novel vertical dual surrounding gate transistor with embedded oxide layer is proposed for capacitorless single transistor DRAM (1T DRAM). The embedded oxide layer is innovatively used to improve the retention time by reducing the recombination rate of stored holes and sensing electrons. Based on T...

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Bibliographic Details
Main Authors: Dongxue Zhao, Zhiliang Xia, Tao Yang, Yuancheng Yang, Wenxi Zhou, Zongliang Huo
Format: Article
Language:English
Published: MDPI AG 2022-10-01
Series:Micromachines
Subjects:
capacitorless
1T DRAM
retention
scaling
embedded oxide layer
Online Access:https://www.mdpi.com/2072-666X/13/10/1772

Internet

https://www.mdpi.com/2072-666X/13/10/1772

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