A Novel Capacitorless 1T DRAM with Embedded Oxide Layer
A novel vertical dual surrounding gate transistor with embedded oxide layer is proposed for capacitorless single transistor DRAM (1T DRAM). The embedded oxide layer is innovatively used to improve the retention time by reducing the recombination rate of stored holes and sensing electrons. Based on T...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-10-01
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| Series: | Micromachines |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2072-666X/13/10/1772 |
| _version_ | 1797471146177724416 |
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| author | Dongxue Zhao Zhiliang Xia Tao Yang Yuancheng Yang Wenxi Zhou Zongliang Huo |
| author_facet | Dongxue Zhao Zhiliang Xia Tao Yang Yuancheng Yang Wenxi Zhou Zongliang Huo |
| author_sort | Dongxue Zhao |
| collection | DOAJ |
| description | A novel vertical dual surrounding gate transistor with embedded oxide layer is proposed for capacitorless single transistor DRAM (1T DRAM). The embedded oxide layer is innovatively used to improve the retention time by reducing the recombination rate of stored holes and sensing electrons. Based on TCAD simulations, the new structure is predicted to not only have the characteristics of fast access, random read and integration of 4F<sup>2</sup> cell, but also to realize good retention and deep scaling. At the same time, the new structure has the potential of scaling compared with the conventional capacitorless 1T DRAM. |
| first_indexed | 2024-03-09T19:45:19Z |
| format | Article |
| id | doaj.art-550664b76124426b909e4f63ebf5ff05 |
| institution | Directory Open Access Journal |
| issn | 2072-666X |
| language | English |
| last_indexed | 2024-03-09T19:45:19Z |
| publishDate | 2022-10-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj.art-550664b76124426b909e4f63ebf5ff052023-11-24T01:24:14ZengMDPI AGMicromachines2072-666X2022-10-011310177210.3390/mi13101772A Novel Capacitorless 1T DRAM with Embedded Oxide LayerDongxue Zhao0Zhiliang Xia1Tao Yang2Yuancheng Yang3Wenxi Zhou4Zongliang Huo5Institute of the Microelectronics of Chinese Academy of Sciences, Beijing 100029, ChinaInstitute of the Microelectronics of Chinese Academy of Sciences, Beijing 100029, ChinaInstitute of the Microelectronics of Chinese Academy of Sciences, Beijing 100029, ChinaYangtze Memory Technologies Co., Ltd., Wuhan 430205, ChinaYangtze Memory Technologies Co., Ltd., Wuhan 430205, ChinaInstitute of the Microelectronics of Chinese Academy of Sciences, Beijing 100029, ChinaA novel vertical dual surrounding gate transistor with embedded oxide layer is proposed for capacitorless single transistor DRAM (1T DRAM). The embedded oxide layer is innovatively used to improve the retention time by reducing the recombination rate of stored holes and sensing electrons. Based on TCAD simulations, the new structure is predicted to not only have the characteristics of fast access, random read and integration of 4F<sup>2</sup> cell, but also to realize good retention and deep scaling. At the same time, the new structure has the potential of scaling compared with the conventional capacitorless 1T DRAM.https://www.mdpi.com/2072-666X/13/10/1772capacitorless1T DRAMretentionscalingembedded oxide layer |
| spellingShingle | Dongxue Zhao Zhiliang Xia Tao Yang Yuancheng Yang Wenxi Zhou Zongliang Huo A Novel Capacitorless 1T DRAM with Embedded Oxide Layer Micromachines capacitorless 1T DRAM retention scaling embedded oxide layer |
| title | A Novel Capacitorless 1T DRAM with Embedded Oxide Layer |
| title_full | A Novel Capacitorless 1T DRAM with Embedded Oxide Layer |
| title_fullStr | A Novel Capacitorless 1T DRAM with Embedded Oxide Layer |
| title_full_unstemmed | A Novel Capacitorless 1T DRAM with Embedded Oxide Layer |
| title_short | A Novel Capacitorless 1T DRAM with Embedded Oxide Layer |
| title_sort | novel capacitorless 1t dram with embedded oxide layer |
| topic | capacitorless 1T DRAM retention scaling embedded oxide layer |
| url | https://www.mdpi.com/2072-666X/13/10/1772 |
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