IEC61131-3 Instruction List Language Processor for FPGAs

IEC61131-3 Instruction List Language Processor for FPGAs

This paper presents the architecture and field-programmable gate array (FPGA) implementation of a 32-bit central processing unit (CPU) dedicated to programmable logic controllers (PLCs). The CPU instruction set directly matches the instructions of the IEC 61131-3 standard Instruction List (IL) langu...

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Bibliographic Details
Main Author: Zbigniew Hajduk
Format: Article
Language:English
Published: MDPI AG 2023-09-01
Series:Electronics
Subjects:
IEC 61131-3 standard
programmable controllers
field-programmable gate arrays
Online Access:https://www.mdpi.com/2079-9292/12/19/4052

Internet

https://www.mdpi.com/2079-9292/12/19/4052

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