Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation

Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation

Abstract In this paper, we propose an inductive line tunneling FET using Epitaxial Tunnel Layer with Ge-Source and Charge Enhancement Insulation (CEI ETL GS-iTFET). The CEI ETL GS-iTFET allows full overlap between the gate and source regions, thereby enhancing the line tunneling. In addition, a germ...

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Bibliographic Details
Main Authors: Jyi-Tsong Lin, Yen-Chen Chang
Format: Article
Language:English
Published: Springer 2023-08-01
Series:Discover Nano
Subjects:
Tunneling effect
Subthreshold swing
Schottky contact
Fermi level pinning
Line tunneling
Online Access:https://doi.org/10.1186/s11671-023-03878-6

Internet

https://doi.org/10.1186/s11671-023-03878-6

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