SB-Router: A Swapped Buffer Activated Low Latency Network-on-Chip Router
Switch Allocation (SA) holds a critical stage in Network-on-Chip (NoC) routers, its performance gets affected adversely due to Head-of-Line (HoL) blocking. In traditionally used Input-Queued Routers (IQR), packets are arranged in a particular order in each Virtual Channel (VC). This implementation i...
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2021-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/9531615/ |