A Novel General Compact Model Approach for 7-nm Technology Node Circuit Optimization From Device Perspective and Beyond
This work presents a novel general compact model for 7-nm technology node devices like FinFETs as an extension of previous conventional compact model that based on some less accurate elements including one-dimensional Poisson equation for three-dimensional devices and analytical equations for short...
Main Authors: | , , , , , , , , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2020-01-01
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Series: | IEEE Journal of the Electron Devices Society |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/9034086/ |