Study of HCI Reliability for PLDMOS

Study of HCI Reliability for PLDMOS

In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are...

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Bibliographic Details
Main Authors: Deivasigamani Ravi, Sheu Gene, Aanand, Wei Lu Shao, Sarwar Imam Syed, Lai Chiu-Chung, Yang Shao-Ming
Format: Article
Language:English
Published: EDP Sciences 2018-01-01
Series:MATEC Web of Conferences
Online Access:https://doi.org/10.1051/matecconf/201820102001

Internet

https://doi.org/10.1051/matecconf/201820102001

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