Study of HCI Reliability for PLDMOS

In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are...

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Main Authors: Deivasigamani Ravi, Sheu Gene, Aanand, Wei Lu Shao, Sarwar Imam Syed, Lai Chiu-Chung, Yang Shao-Ming
Format: Article
Language:English
Published: EDP Sciences 2018-01-01
Series:MATEC Web of Conferences
Online Access:https://doi.org/10.1051/matecconf/201820102001
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author Deivasigamani Ravi
Sheu Gene
Aanand
Wei Lu Shao
Sarwar Imam Syed
Lai Chiu-Chung
Yang Shao-Ming
author_facet Deivasigamani Ravi
Sheu Gene
Aanand
Wei Lu Shao
Sarwar Imam Syed
Lai Chiu-Chung
Yang Shao-Ming
author_sort Deivasigamani Ravi
collection DOAJ
description In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are injected into the gate oxide, creating negative fixed oxide charges and interface-states above the accumulation region and the channel. Increase of the drain-source current is induced by the negative fixed oxide charges. The physical model of the degradation has been proven combining experimental data and TCAD simulations.
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spelling doaj.art-5a6ebd875f8c431491b2ba8eb81a19072022-12-21T18:30:38ZengEDP SciencesMATEC Web of Conferences2261-236X2018-01-012010200110.1051/matecconf/201820102001matecconf_ici2017_02001Study of HCI Reliability for PLDMOSDeivasigamani RaviSheu GeneAanandWei Lu ShaoSarwar Imam SyedLai Chiu-ChungYang Shao-MingIn this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are injected into the gate oxide, creating negative fixed oxide charges and interface-states above the accumulation region and the channel. Increase of the drain-source current is induced by the negative fixed oxide charges. The physical model of the degradation has been proven combining experimental data and TCAD simulations.https://doi.org/10.1051/matecconf/201820102001
spellingShingle Deivasigamani Ravi
Sheu Gene
Aanand
Wei Lu Shao
Sarwar Imam Syed
Lai Chiu-Chung
Yang Shao-Ming
Study of HCI Reliability for PLDMOS
MATEC Web of Conferences
title Study of HCI Reliability for PLDMOS
title_full Study of HCI Reliability for PLDMOS
title_fullStr Study of HCI Reliability for PLDMOS
title_full_unstemmed Study of HCI Reliability for PLDMOS
title_short Study of HCI Reliability for PLDMOS
title_sort study of hci reliability for pldmos
url https://doi.org/10.1051/matecconf/201820102001
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AT sheugene studyofhcireliabilityforpldmos
AT aanand studyofhcireliabilityforpldmos
AT weilushao studyofhcireliabilityforpldmos
AT sarwarimamsyed studyofhcireliabilityforpldmos
AT laichiuchung studyofhcireliabilityforpldmos
AT yangshaoming studyofhcireliabilityforpldmos