Study of HCI Reliability for PLDMOS
In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are...
Main Authors: | , , , , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
EDP Sciences
2018-01-01
|
Series: | MATEC Web of Conferences |
Online Access: | https://doi.org/10.1051/matecconf/201820102001 |
_version_ | 1819133124392517632 |
---|---|
author | Deivasigamani Ravi Sheu Gene Aanand Wei Lu Shao Sarwar Imam Syed Lai Chiu-Chung Yang Shao-Ming |
author_facet | Deivasigamani Ravi Sheu Gene Aanand Wei Lu Shao Sarwar Imam Syed Lai Chiu-Chung Yang Shao-Ming |
author_sort | Deivasigamani Ravi |
collection | DOAJ |
description | In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are injected into the gate oxide, creating negative fixed oxide charges and interface-states above the accumulation region and the channel. Increase of the drain-source current is induced by the negative fixed oxide charges. The physical model of the degradation has been proven combining experimental data and TCAD simulations. |
first_indexed | 2024-12-22T09:42:18Z |
format | Article |
id | doaj.art-5a6ebd875f8c431491b2ba8eb81a1907 |
institution | Directory Open Access Journal |
issn | 2261-236X |
language | English |
last_indexed | 2024-12-22T09:42:18Z |
publishDate | 2018-01-01 |
publisher | EDP Sciences |
record_format | Article |
series | MATEC Web of Conferences |
spelling | doaj.art-5a6ebd875f8c431491b2ba8eb81a19072022-12-21T18:30:38ZengEDP SciencesMATEC Web of Conferences2261-236X2018-01-012010200110.1051/matecconf/201820102001matecconf_ici2017_02001Study of HCI Reliability for PLDMOSDeivasigamani RaviSheu GeneAanandWei Lu ShaoSarwar Imam SyedLai Chiu-ChungYang Shao-MingIn this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons, generated by impact ionization during stress, are injected into the gate oxide, creating negative fixed oxide charges and interface-states above the accumulation region and the channel. Increase of the drain-source current is induced by the negative fixed oxide charges. The physical model of the degradation has been proven combining experimental data and TCAD simulations.https://doi.org/10.1051/matecconf/201820102001 |
spellingShingle | Deivasigamani Ravi Sheu Gene Aanand Wei Lu Shao Sarwar Imam Syed Lai Chiu-Chung Yang Shao-Ming Study of HCI Reliability for PLDMOS MATEC Web of Conferences |
title | Study of HCI Reliability for PLDMOS |
title_full | Study of HCI Reliability for PLDMOS |
title_fullStr | Study of HCI Reliability for PLDMOS |
title_full_unstemmed | Study of HCI Reliability for PLDMOS |
title_short | Study of HCI Reliability for PLDMOS |
title_sort | study of hci reliability for pldmos |
url | https://doi.org/10.1051/matecconf/201820102001 |
work_keys_str_mv | AT deivasigamaniravi studyofhcireliabilityforpldmos AT sheugene studyofhcireliabilityforpldmos AT aanand studyofhcireliabilityforpldmos AT weilushao studyofhcireliabilityforpldmos AT sarwarimamsyed studyofhcireliabilityforpldmos AT laichiuchung studyofhcireliabilityforpldmos AT yangshaoming studyofhcireliabilityforpldmos |