| Summary: | Abstract By introducing a capacitor in series (CST), a self‐terminated (ST) operation scheme is proposed to achieve high‐parallel forming of resistive random access memory (RRAM) array with reduced time and energy consumption. Once the RRAM cell is switched to the low‐resistance state, the current is automatically cut off by the capacitor, which can significantly improve the parallelism and energy efficiency. The wire capacitance of interconnect (Cwire) can be utilized as CST, which means there is no addition circuit or process expense for the proposed ST scheme. After successful experimental verification of the proposed ST operation scheme in 1 kb RRAM array, the performance of 1 Gb RRAM memory is evaluated, which shows × 103 improvement in forming time (from 0.6 h to 0.84 s) and × 104 improvement in energy consumption. Moreover, by experimentally leveraging the operation scheme for array forming, the operation current is reduced in subsequent switching process without deteriorating the device reliability, which demonstrates the feasibility of the proposed ST operation scheme and its potential in low power applications.
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