Pushing the high-k scalability limit with a superparaelectric gate layer

Pushing the high-k scalability limit with a superparaelectric gate layer

To meet the expectation set by Moore’s law on transistors, the search for thickness-scalable high dielectric constant (k) gate layers has become an emergent research frontier. Previous investigations have failed to solve the “polarizability–scalability–insulation robustness” trilemma. In this work,...

Full description

Bibliographic Details
Main Authors: Kun Wang, Chao Liu, Yuan Zhang, Fuyu Lv, Jun Ouyang, Houbing Huang, Rui-long Yang, Yu-Yao Zhao, Hongbo Cheng, Hanfei Zhu, Xiaoming Shi, Yun Tian
Format: Article
Language:English
Published: Tsinghua University Press 2024-04-01
Series:Journal of Advanced Ceramics
Subjects:
high-k
transistors
moore’s law
superparaelectric
insulation robustness
Online Access:https://www.sciopen.com/article/10.26599/JAC.2024.9220876

Internet

https://www.sciopen.com/article/10.26599/JAC.2024.9220876

Similar Items