Efficient Synapse Memory Structure for Reconfigurable Digital Neuromorphic Hardware

Efficient Synapse Memory Structure for Reconfigurable Digital Neuromorphic Hardware

Spiking Neural Networks (SNNs) have high potential to process information efficiently with binary spikes and time delay information. Recently, dedicated SNN hardware accelerators with on-chip synapse memory array are gaining interest in overcoming the limitations of running software-based SNN in con...

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Bibliographic Details
Main Authors: Jinseok Kim, Jongeun Koo, Taesu Kim, Jae-Joon Kim
Format: Article
Language:English
Published: Frontiers Media S.A. 2018-11-01
Series:Frontiers in Neuroscience
Subjects:
neuromorphic system
spiking neural network
spike-timing-dependent plasticity
on-chip learning
transposable memory
Online Access:https://www.frontiersin.org/article/10.3389/fnins.2018.00829/full

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https://www.frontiersin.org/article/10.3389/fnins.2018.00829/full

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