A GaN-Integrated Galvanically Isolated Data Link Based on RF Planar Coupling With Voltage Combining for Gate-Driver Applications

A GaN-Integrated Galvanically Isolated Data Link Based on RF Planar Coupling With Voltage Combining for Gate-Driver Applications

In this paper the design of a galvanically isolated data link for gate-driver applications in GaN technology is presented. The isolation channel exploits the near-field RF planar coupling between micro-antennas placed on two side-by-side co-packaged chips. Adopted package-scale isolation has several...

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Bibliographic Details
Main Authors: Simone Spataro, Egidio Ragonese, Nunzio Spina, Giuseppe Palmisano
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Access
Subjects:
Class D oscillator
current-reuse
dynamic offset compensation
galvanic isolation
GaN technology
gate driver
Online Access:https://ieeexplore.ieee.org/document/10486913/

Internet

https://ieeexplore.ieee.org/document/10486913/

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