A digital clock and data strobe aligner for write calibration of dynamic random access memory
Abstract This paper proposes a digital clock and data strobe aligner for write calibration of dynamic random access memory (DRAM). The edge recognizer determines the input phase skew between a falling edge of clock and a rising edge of data strobe (DQS) signal to maximize setup and hold margins of D...
| Main Authors: | , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2022-03-01
|
| Series: | Electronics Letters |
| Online Access: | https://doi.org/10.1049/ell2.12428 |