A digital clock and data strobe aligner for write calibration of dynamic random access memory
Abstract This paper proposes a digital clock and data strobe aligner for write calibration of dynamic random access memory (DRAM). The edge recognizer determines the input phase skew between a falling edge of clock and a rising edge of data strobe (DQS) signal to maximize setup and hold margins of D...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2022-03-01
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| Series: | Electronics Letters |
| Online Access: | https://doi.org/10.1049/ell2.12428 |
| _version_ | 1818250121476833280 |
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| author | Chae‐Young Jung Won‐Young Lee |
| author_facet | Chae‐Young Jung Won‐Young Lee |
| author_sort | Chae‐Young Jung |
| collection | DOAJ |
| description | Abstract This paper proposes a digital clock and data strobe aligner for write calibration of dynamic random access memory (DRAM). The edge recognizer determines the input phase skew between a falling edge of clock and a rising edge of data strobe (DQS) signal to maximize setup and hold margins of DQS and clock synchronization. According to experimental results, the proposed circuit achieves the minimum and maximum output skews are −6.9 ps and 7.5 ps when DQS skews of ±227 ps are applied. The chip has been fabricated in 180 nm CMOS technology and the active chip area is 0.091 mm2. |
| first_indexed | 2024-12-12T15:47:21Z |
| format | Article |
| id | doaj.art-60f5a57b95634a6482700c591d2abefd |
| institution | Directory Open Access Journal |
| issn | 0013-5194 1350-911X |
| language | English |
| last_indexed | 2024-12-12T15:47:21Z |
| publishDate | 2022-03-01 |
| publisher | Wiley |
| record_format | Article |
| series | Electronics Letters |
| spelling | doaj.art-60f5a57b95634a6482700c591d2abefd2022-12-22T00:19:42ZengWileyElectronics Letters0013-51941350-911X2022-03-0158726827010.1049/ell2.12428A digital clock and data strobe aligner for write calibration of dynamic random access memoryChae‐Young Jung0Won‐Young Lee1Department of Electronic and IT Media Engineering Seoul National University of Science and Technology Seoul KoreaDepartment of Electronic and IT Media Engineering Seoul National University of Science and Technology Seoul KoreaAbstract This paper proposes a digital clock and data strobe aligner for write calibration of dynamic random access memory (DRAM). The edge recognizer determines the input phase skew between a falling edge of clock and a rising edge of data strobe (DQS) signal to maximize setup and hold margins of DQS and clock synchronization. According to experimental results, the proposed circuit achieves the minimum and maximum output skews are −6.9 ps and 7.5 ps when DQS skews of ±227 ps are applied. The chip has been fabricated in 180 nm CMOS technology and the active chip area is 0.091 mm2.https://doi.org/10.1049/ell2.12428 |
| spellingShingle | Chae‐Young Jung Won‐Young Lee A digital clock and data strobe aligner for write calibration of dynamic random access memory Electronics Letters |
| title | A digital clock and data strobe aligner for write calibration of dynamic random access memory |
| title_full | A digital clock and data strobe aligner for write calibration of dynamic random access memory |
| title_fullStr | A digital clock and data strobe aligner for write calibration of dynamic random access memory |
| title_full_unstemmed | A digital clock and data strobe aligner for write calibration of dynamic random access memory |
| title_short | A digital clock and data strobe aligner for write calibration of dynamic random access memory |
| title_sort | digital clock and data strobe aligner for write calibration of dynamic random access memory |
| url | https://doi.org/10.1049/ell2.12428 |
| work_keys_str_mv | AT chaeyoungjung adigitalclockanddatastrobealignerforwritecalibrationofdynamicrandomaccessmemory AT wonyounglee adigitalclockanddatastrobealignerforwritecalibrationofdynamicrandomaccessmemory AT chaeyoungjung digitalclockanddatastrobealignerforwritecalibrationofdynamicrandomaccessmemory AT wonyounglee digitalclockanddatastrobealignerforwritecalibrationofdynamicrandomaccessmemory |