Schottky-Embedded Isolation Ring to Improve Latch-Up Immunity Between HV and LV Circuits in a 0.18 μm BCD Technology

Schottky-Embedded Isolation Ring to Improve Latch-Up Immunity Between HV and LV Circuits in a 0.18 μm BCD Technology

As the high-voltage (HV) and low-voltage (LV) circuits are integrated together in a common silicon substrate, the parasitic latch-up path between neighboring HV and LV circuits with limited spacing in layout would be triggered into latch-up state to cause unrecoverable failure in the chip. In this w...

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Bibliographic Details
Main Authors: Zi-Hong Jiang, Ming-Dou Ker
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Holding voltage
HV n-well (HVNW)
isolation ring
Latch-up
N-buried layer (NBL)
Schottky embedded junction
Online Access:https://ieeexplore.ieee.org/document/9816057/

Internet

https://ieeexplore.ieee.org/document/9816057/

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