A high‐performance full swing 1‐bit hybrid full adder cell

Abstract This study proposes an 18‐transistor full adder (FA) cell based on the full swing hybrid logic style. It has a first stage comprising the XOR‐XNOR module followed by pass transistors and inverters to generate the sum and carry outputs. The performance evaluation of the proposed FA cell has...

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Bibliographic Details
Main Authors: Shahbaz Hussain, Mehedi Hasan, Gazal Agrawal, Mohd Hasan
Format: Article
Language:English
Published: Hindawi-IET 2022-05-01
Series:IET Circuits, Devices and Systems
Subjects:
Online Access:https://doi.org/10.1049/cds2.12097