Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts
Abstract Overcurrent failure caused by imbalanced current distribution is one of the universal failure forms of the SiC MOSFET module. The current sharing of parallel SiC MOSFETs is an important guarantee for the safe and reliable operation of parallel devices even the whole system. The existence of...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2022-01-01
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| Series: | IET Power Electronics |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/pel2.12211 |
| _version_ | 1797991545434013696 |
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| author | Bin Zhao Junji Ke Qiuping Yu Peng Sun Yumeng Cai Zhibin Zhao |
| author_facet | Bin Zhao Junji Ke Qiuping Yu Peng Sun Yumeng Cai Zhibin Zhao |
| author_sort | Bin Zhao |
| collection | DOAJ |
| description | Abstract Overcurrent failure caused by imbalanced current distribution is one of the universal failure forms of the SiC MOSFET module. The current sharing of parallel SiC MOSFETs is an important guarantee for the safe and reliable operation of parallel devices even the whole system. The existence of current coupling has a significant influence on the current sharing among paralleled SiC MOSFETs. Here, the mechanism of dynamic and static current imbalance under the different layouts resulting from current coupling generated by common branch impedance coupling and mutual inductance is comprehensively investigated by theoretical analysis and simulation validations. It is concluded that dynamic current imbalance is more serious when the drain confluence point and power source confluence point are on both sides than they are on the one side. While, the influence of the arrangement of two confluence points on the static current distribution is in reverse. Finally, a flexible and adjustable test bench is designed to verify the current sharing performance on the different layouts. The experimental results validate the correctness of the theoretical analysis. Based on these results, some guidelines are provided for the parallel‐connected application of SiC MOSFETs. |
| first_indexed | 2024-04-11T08:53:53Z |
| format | Article |
| id | doaj.art-63573ddd4a904490bc7f1a1a896dc9e7 |
| institution | Directory Open Access Journal |
| issn | 1755-4535 1755-4543 |
| language | English |
| last_indexed | 2024-04-11T08:53:53Z |
| publishDate | 2022-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | IET Power Electronics |
| spelling | doaj.art-63573ddd4a904490bc7f1a1a896dc9e72022-12-22T04:33:21ZengWileyIET Power Electronics1755-45351755-45432022-01-01151435610.1049/pel2.12211Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layoutsBin Zhao0Junji Ke1Qiuping Yu2Peng Sun3Yumeng Cai4Zhibin Zhao5The State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing ChinaShanghai Belling Co., Ltd. Shanghai ChinaThe State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing ChinaThe State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing ChinaThe State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing ChinaThe State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing ChinaAbstract Overcurrent failure caused by imbalanced current distribution is one of the universal failure forms of the SiC MOSFET module. The current sharing of parallel SiC MOSFETs is an important guarantee for the safe and reliable operation of parallel devices even the whole system. The existence of current coupling has a significant influence on the current sharing among paralleled SiC MOSFETs. Here, the mechanism of dynamic and static current imbalance under the different layouts resulting from current coupling generated by common branch impedance coupling and mutual inductance is comprehensively investigated by theoretical analysis and simulation validations. It is concluded that dynamic current imbalance is more serious when the drain confluence point and power source confluence point are on both sides than they are on the one side. While, the influence of the arrangement of two confluence points on the static current distribution is in reverse. Finally, a flexible and adjustable test bench is designed to verify the current sharing performance on the different layouts. The experimental results validate the correctness of the theoretical analysis. Based on these results, some guidelines are provided for the parallel‐connected application of SiC MOSFETs.https://doi.org/10.1049/pel2.12211Insulated gate field effect transistors |
| spellingShingle | Bin Zhao Junji Ke Qiuping Yu Peng Sun Yumeng Cai Zhibin Zhao Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts IET Power Electronics Insulated gate field effect transistors |
| title | Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts |
| title_full | Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts |
| title_fullStr | Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts |
| title_full_unstemmed | Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts |
| title_short | Effect of common branch impedance coupling and mutual inductance on current sharing of paralleled SiC MOSFETs with different layouts |
| title_sort | effect of common branch impedance coupling and mutual inductance on current sharing of paralleled sic mosfets with different layouts |
| topic | Insulated gate field effect transistors |
| url | https://doi.org/10.1049/pel2.12211 |
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