Analysis of Booth Multiplier based Conventional and Short Word Length FIR Filter
The optimized implantation of digital filters has remained one of the challenging tasks, for FPGA (Field- Programmable Gate Array) based system designers, due to the involvement of very complex circuitry for multiplication. The multiplier consumes more recourse and hence results in less speed, being...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
Published: |
Mehran University of Engineering and Technology
2018-07-01
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Series: | Mehran University Research Journal of Engineering and Technology |
Subjects: | |
Online Access: | https://doi.org/10.22581/muet1982.1803.13 |