An FPGA Architecture for the RRT Algorithm Based on Membrane Computing
This paper investigates an FPGA architecture whose primary function is to accelerate parallel computations involved in the rapid-exploring random tree (RRT) algorithm. The RRT algorithm is inherently serial, while in each computing step there are many computations that can be executed simultaneously...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2023-06-01
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Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/12/12/2741 |