A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification

A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification

In embedded applications that use neural networks (NNs) for classification tasks, it is important to not only minimize the power consumption of the NN calculation, but of the whole system. Optimization approaches for individual parts exist, such as quantization of the NN or analog calculation of ari...

Full description

Bibliographic Details
Main Authors: Daniel Reiser, Peter Reichel, Stefan Pechmann, Maen Mallah, Maximilian Oppelt, Amelie Hagelauer, Marco Breiling, Dietmar Fey, Marc Reichenbach
Format: Article
Language:English
Published: MDPI AG 2021-12-01
Series:Journal of Low Power Electronics and Applications
Subjects:
hardware architecture
neural networks
non-volatile memory
wearable AI
RRAM
Online Access:https://www.mdpi.com/2079-9268/12/1/2

Internet

https://www.mdpi.com/2079-9268/12/1/2

Similar Items