A Hardware Architecture Design for High-Speed Vessel Orientation Recognition
Vascular orientation recognition (VOR) holds widespread applications in biomedical domains such as vascular image processing. Although many methods based on deep learning (DL) running on CPUs have been proposed and achieved appreciable results, they encounter a speed bottleneck. Therefore, an FPGA-b...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10711258/ |