Improving Characteristics of FPGA-Based FSMs Representing Sequential Blocks of Cyber-Physical Systems

This work proposes a method for hardware reduction in circuits of Mealy finite state machines (FSMs). The circuits are implemented as networks of interconnected look-up table (LUT) elements. The FSMs with twofold state assignment and encoding of output collections are discussed. The method is based...

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Bibliographic Details
Main Authors: Alexander Barkalov, Larysa Titarenko, Kazimierz Krzywicki, Svetlana Saburova
Format: Article
Language:English
Published: MDPI AG 2023-09-01
Series:Applied Sciences
Subjects:
Online Access:https://www.mdpi.com/2076-3417/13/18/10200