DIRECT TUNNELLING AND MOSFET BORDER TRAPS
The border traps, in particular slow border traps, are being investigated in metal-oxide-semiconductor structures, utilizing n-channel MOSFET as a test sample. The industrial process technology of test samples manufacturing is described. The automated experimental setup is discussed, the implementat...
| Main Author: | |
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| Format: | Article |
| Language: | English |
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Science and Innovation Center Publishing House
2015-09-01
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| Series: | International Journal of Advanced Studies |
| Subjects: | |
| Online Access: | http://journal-s.org/index.php/ijas/article/view/8532 |
| _version_ | 1819135725282525184 |
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| author | Vladimir Drach |
| author_facet | Vladimir Drach |
| author_sort | Vladimir Drach |
| collection | DOAJ |
| description | The border traps, in particular slow border traps, are being investigated in metal-oxide-semiconductor structures, utilizing n-channel MOSFET as a test sample. The industrial process technology of test samples manufacturing is described. The automated experimental setup is discussed, the implementation of the experimental setup had made it possible to complete the entire set of measurements. The schematic diagram of automated experimental setup is shown. The charging time characteristic of the ID-VG shift reveals that the charging process is a direct tunnelling process and highly bias dependent. |
| first_indexed | 2024-12-22T10:23:39Z |
| format | Article |
| id | doaj.art-6d73a1ae7be949b78c3d0be572bb0cc6 |
| institution | Directory Open Access Journal |
| issn | 2328-1391 2227-930X |
| language | English |
| last_indexed | 2024-12-22T10:23:39Z |
| publishDate | 2015-09-01 |
| publisher | Science and Innovation Center Publishing House |
| record_format | Article |
| series | International Journal of Advanced Studies |
| spelling | doaj.art-6d73a1ae7be949b78c3d0be572bb0cc62022-12-21T18:29:33ZengScience and Innovation Center Publishing HouseInternational Journal of Advanced Studies2328-13912227-930X2015-09-015375795225DIRECT TUNNELLING AND MOSFET BORDER TRAPSVladimir Drach0Bauman Moscow State Technical University (Kaluga Branch)The border traps, in particular slow border traps, are being investigated in metal-oxide-semiconductor structures, utilizing n-channel MOSFET as a test sample. The industrial process technology of test samples manufacturing is described. The automated experimental setup is discussed, the implementation of the experimental setup had made it possible to complete the entire set of measurements. The schematic diagram of automated experimental setup is shown. The charging time characteristic of the ID-VG shift reveals that the charging process is a direct tunnelling process and highly bias dependent.http://journal-s.org/index.php/ijas/article/view/8532MOSFETgate oxideborder trapsdirect tunnelling |
| spellingShingle | Vladimir Drach DIRECT TUNNELLING AND MOSFET BORDER TRAPS International Journal of Advanced Studies MOSFET gate oxide border traps direct tunnelling |
| title | DIRECT TUNNELLING AND MOSFET BORDER TRAPS |
| title_full | DIRECT TUNNELLING AND MOSFET BORDER TRAPS |
| title_fullStr | DIRECT TUNNELLING AND MOSFET BORDER TRAPS |
| title_full_unstemmed | DIRECT TUNNELLING AND MOSFET BORDER TRAPS |
| title_short | DIRECT TUNNELLING AND MOSFET BORDER TRAPS |
| title_sort | direct tunnelling and mosfet border traps |
| topic | MOSFET gate oxide border traps direct tunnelling |
| url | http://journal-s.org/index.php/ijas/article/view/8532 |
| work_keys_str_mv | AT vladimirdrach directtunnellingandmosfetbordertraps |