Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory

Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory

Abstract Three-terminal (3-T) thyristor random-access memory is explored for a next-generation high-density nanoscale vertical cross-point array. The effects of standby voltages on the device are thoroughly investigated in terms of gate–cathode voltage (V GC,ST) and anode–cathode voltage (V AC,ST) i...

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Bibliographic Details
Main Authors: Hyangwoo Kim, Hyeonsu Cho, Hyeon-Tak Kwak, Myunghae Seo, Seungho Lee, Byoung Don Kong, Chang-Ki Baek
Format: Article
Language:English
Published: SpringerOpen 2022-02-01
Series:Nanoscale Research Letters
Subjects:
Capacitorless 1T DRAM
Memory array operation
Memory disturbance
Three-terminal TRAM
Gated-thyristors
Online Access:https://doi.org/10.1186/s11671-022-03667-7

Internet

https://doi.org/10.1186/s11671-022-03667-7

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