RC Parasitic-Aware Layout Analysis and Routing Optimization Methodology

RC Parasitic-Aware Layout Analysis and Routing Optimization Methodology

A parasitic-aware routing optimization and analysis methodology for integrated circuits is developed based on an incremental parasitic extraction and a fast optimization methodology. Existing routing optimization methodologies rely on many circuit simulations, detailed sensitivity analysis, and inef...

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Bibliographic Details
Main Authors: Mohamed Saleh Abouelyazid, Sherif Hammouda, Yehea Ismail
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Layout routing
routing optimization
parasitic-aware
incremental extraction
Online Access:https://ieeexplore.ieee.org/document/9870785/

Internet

https://ieeexplore.ieee.org/document/9870785/

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