A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block
To give consideration to both chip density and device performance, an In<sub>0.53</sub>Ga<sub>0.47</sub>As vertical electron–hole bilayer tunnel field effect transistor (EHBTFET) with a P<sup>+</sup>-pocket and an In<sub>0.52</sub>Al<sub>0.48<...
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| Format: | Article |
| Language: | English |
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MDPI AG
2023-10-01
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| Series: | Micromachines |
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| Online Access: | https://www.mdpi.com/2072-666X/14/11/2049 |
| _version_ | 1797458379298308096 |
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| author | Hu Liu Peifeng Li Xiaoyu Zhou Pengyu Wang Yubin Li Lei Pan Wenting Zhang Yao Li |
| author_facet | Hu Liu Peifeng Li Xiaoyu Zhou Pengyu Wang Yubin Li Lei Pan Wenting Zhang Yao Li |
| author_sort | Hu Liu |
| collection | DOAJ |
| description | To give consideration to both chip density and device performance, an In<sub>0.53</sub>Ga<sub>0.47</sub>As vertical electron–hole bilayer tunnel field effect transistor (EHBTFET) with a P<sup>+</sup>-pocket and an In<sub>0.52</sub>Al<sub>0.48</sub>As-block (VPB-EHBTFET) is introduced and systematically studied by TCAD simulation. The introduction of the P<sup>+</sup>-pocket can reduce the line tunneling distance, thereby enhancing the on-state current. This can also effectively address the challenge of forming a hole inversion layer in an undoped InGaAs channel during device fabrication. Moreover, the point tunneling can be significantly suppressed by the In<sub>0.52</sub>Al<sub>0.48</sub>As-block, resulting in a substantial decrease in the off-state current. By optimizing the width and doping concentration of the P<sup>+</sup>-pocket as well as the length and width of the In<sub>0.52</sub>Al<sub>0.48</sub>As-block, VPB-EHBTFET can obtain an off-state current of 1.83 × 10<sup>−19</sup> A/μm, on-state current of 1.04 × 10<sup>−4</sup> A/μm, and an average subthreshold swing of 5.5 mV/dec. Compared with traditional InGaAs vertical EHBTFET, the proposed VPB-EHBTFET has a three orders of magnitude decrease in the off-state current, about six times increase in the on-state current, 81.8% reduction in the average subthreshold swing, and stronger inhibitory ability on the drain-induced barrier-lowering effect (7.5 mV/V); these benefits enhance the practical application of EHBTFETs. |
| first_indexed | 2024-03-09T16:36:15Z |
| format | Article |
| id | doaj.art-71a5a8dc7bf147f2ae0e62f588236862 |
| institution | Directory Open Access Journal |
| issn | 2072-666X |
| language | English |
| last_indexed | 2024-03-09T16:36:15Z |
| publishDate | 2023-10-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj.art-71a5a8dc7bf147f2ae0e62f5882368622023-11-24T14:56:22ZengMDPI AGMicromachines2072-666X2023-10-011411204910.3390/mi14112049A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-BlockHu Liu0Peifeng Li1Xiaoyu Zhou2Pengyu Wang3Yubin Li4Lei Pan5Wenting Zhang6Yao Li7School of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaSchool of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, ChinaTo give consideration to both chip density and device performance, an In<sub>0.53</sub>Ga<sub>0.47</sub>As vertical electron–hole bilayer tunnel field effect transistor (EHBTFET) with a P<sup>+</sup>-pocket and an In<sub>0.52</sub>Al<sub>0.48</sub>As-block (VPB-EHBTFET) is introduced and systematically studied by TCAD simulation. The introduction of the P<sup>+</sup>-pocket can reduce the line tunneling distance, thereby enhancing the on-state current. This can also effectively address the challenge of forming a hole inversion layer in an undoped InGaAs channel during device fabrication. Moreover, the point tunneling can be significantly suppressed by the In<sub>0.52</sub>Al<sub>0.48</sub>As-block, resulting in a substantial decrease in the off-state current. By optimizing the width and doping concentration of the P<sup>+</sup>-pocket as well as the length and width of the In<sub>0.52</sub>Al<sub>0.48</sub>As-block, VPB-EHBTFET can obtain an off-state current of 1.83 × 10<sup>−19</sup> A/μm, on-state current of 1.04 × 10<sup>−4</sup> A/μm, and an average subthreshold swing of 5.5 mV/dec. Compared with traditional InGaAs vertical EHBTFET, the proposed VPB-EHBTFET has a three orders of magnitude decrease in the off-state current, about six times increase in the on-state current, 81.8% reduction in the average subthreshold swing, and stronger inhibitory ability on the drain-induced barrier-lowering effect (7.5 mV/V); these benefits enhance the practical application of EHBTFETs.https://www.mdpi.com/2072-666X/14/11/2049tunnel field effect transistorline tunnelingP<sup>+</sup>-pocketInGaAs/InAlAs |
| spellingShingle | Hu Liu Peifeng Li Xiaoyu Zhou Pengyu Wang Yubin Li Lei Pan Wenting Zhang Yao Li A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block Micromachines tunnel field effect transistor line tunneling P<sup>+</sup>-pocket InGaAs/InAlAs |
| title | A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block |
| title_full | A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block |
| title_fullStr | A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block |
| title_full_unstemmed | A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block |
| title_short | A High-Performance InGaAs Vertical Electron–Hole Bilayer Tunnel Field Effect Transistor with P<sup>+</sup>-Pocket and InAlAs-Block |
| title_sort | high performance ingaas vertical electron hole bilayer tunnel field effect transistor with p sup sup pocket and inalas block |
| topic | tunnel field effect transistor line tunneling P<sup>+</sup>-pocket InGaAs/InAlAs |
| url | https://www.mdpi.com/2072-666X/14/11/2049 |
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