Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection
Two-dimensional materials have modernized a broad interest in electronic devices. Along with many advantages, their atomic-level thickness makes them sensitive under high electrical stress. This work proposes a protection design using a Graphene/Silicon (Gr/Si) Schottky diode as the protective devic...
| Main Authors: | , , , , , , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2022-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9919268/ |
| _version_ | 1811197416130478080 |
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| author | Muhammad Abid Anwar Munir Ali Dong Pu Srikrishna Chanakya Bodepudi Jianhang Lv Khurram Shehzad Xiaochen Wang Ali Imran Yuda Zhao Shurong Dong Huan Hu Bin Yu Yang Xu |
| author_facet | Muhammad Abid Anwar Munir Ali Dong Pu Srikrishna Chanakya Bodepudi Jianhang Lv Khurram Shehzad Xiaochen Wang Ali Imran Yuda Zhao Shurong Dong Huan Hu Bin Yu Yang Xu |
| author_sort | Muhammad Abid Anwar |
| collection | DOAJ |
| description | Two-dimensional materials have modernized a broad interest in electronic devices. Along with many advantages, their atomic-level thickness makes them sensitive under high electrical stress. This work proposes a protection design using a Graphene/Silicon (Gr/Si) Schottky diode as the protective device, which helps to improve the endurance for unwanted fluctuations in operating voltage of 2D heterostructure-based devices. In this scheme, the 2D heterostructure was configured parallel with the protective device (Gr/Si diode) for electrical measurements. It was found that Gr/Si diode handles a large portion of initial surge current peaks, which significantly increases the durability and lifetime of 2D material-based heterostructure devices. This scheme potentially bridges mature CMOS technology and novel 2D-based heterostructure applications for robust futuristic devices. |
| first_indexed | 2024-04-12T01:13:27Z |
| format | Article |
| id | doaj.art-72a6d2c1be7949fab5d54697afaa0c76 |
| institution | Directory Open Access Journal |
| issn | 2168-6734 |
| language | English |
| last_indexed | 2024-04-12T01:13:27Z |
| publishDate | 2022-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj.art-72a6d2c1be7949fab5d54697afaa0c762022-12-22T03:54:02ZengIEEEIEEE Journal of the Electron Devices Society2168-67342022-01-011097097510.1109/JEDS.2022.32146629919268Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure ProtectionMuhammad Abid Anwar0Munir Ali1Dong Pu2Srikrishna Chanakya Bodepudi3Jianhang Lv4https://orcid.org/0000-0001-5468-2623Khurram Shehzad5Xiaochen Wang6Ali Imran7Yuda Zhao8Shurong Dong9https://orcid.org/0000-0002-8715-7072Huan Hu10https://orcid.org/0000-0002-1317-5470Bin Yu11Yang Xu12https://orcid.org/0000-0003-3148-7678School of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaSchool of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and Technological Innovation Center, ZJU-UIUC Joint Institute, State Key Laboratory of Silicon Materials, Zhejiang University, Hangzhou, ChinaTwo-dimensional materials have modernized a broad interest in electronic devices. Along with many advantages, their atomic-level thickness makes them sensitive under high electrical stress. This work proposes a protection design using a Graphene/Silicon (Gr/Si) Schottky diode as the protective device, which helps to improve the endurance for unwanted fluctuations in operating voltage of 2D heterostructure-based devices. In this scheme, the 2D heterostructure was configured parallel with the protective device (Gr/Si diode) for electrical measurements. It was found that Gr/Si diode handles a large portion of initial surge current peaks, which significantly increases the durability and lifetime of 2D material-based heterostructure devices. This scheme potentially bridges mature CMOS technology and novel 2D-based heterostructure applications for robust futuristic devices.https://ieeexplore.ieee.org/document/9919268/Protection deviceelectrical stressgraphene/silicon diode2D heterostructure PN diode |
| spellingShingle | Muhammad Abid Anwar Munir Ali Dong Pu Srikrishna Chanakya Bodepudi Jianhang Lv Khurram Shehzad Xiaochen Wang Ali Imran Yuda Zhao Shurong Dong Huan Hu Bin Yu Yang Xu Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection IEEE Journal of the Electron Devices Society Protection device electrical stress graphene/silicon diode 2D heterostructure PN diode |
| title | Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection |
| title_full | Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection |
| title_fullStr | Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection |
| title_full_unstemmed | Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection |
| title_short | Graphene–Silicon Diode for 2-D Heterostructure Electrical Failure Protection |
| title_sort | graphene x2013 silicon diode for 2 d heterostructure electrical failure protection |
| topic | Protection device electrical stress graphene/silicon diode 2D heterostructure PN diode |
| url | https://ieeexplore.ieee.org/document/9919268/ |
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