Match‐line control unit for power and delay reduction in hybrid CAM

Abstract Content addressable memory (CAM) is a hardware search engine utilised for accelerating translation and table look‐up in network routers and data processing systems. This article proposes a NAND‐NOR match‐line (ML) based CAM architecture with the main goals of elevating search performance an...

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Bibliographic Details
Main Authors: Sheikh Wasmir Hussain, Telajala Venkata Mahendra, Sandeep Mishra, Anup Dandapat
Format: Article
Language:English
Published: Hindawi-IET 2021-05-01
Series:IET Circuits, Devices and Systems
Subjects:
Online Access:https://doi.org/10.1049/cds2.12024