| Summary: | The ferroelectric field-effect transistor (FeFET) is one of the most promising candidates for emerging nonvolatile memory devices owing to its low write energy and high <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}}/I_{\mathrm {OFF}}$ </tex-math></inline-formula> ratio. For FeFET applications as nonvolatile memory devices, 1FeFET, 1T-1FeFET, 2T-1FeFET, and 3T-1FeFET cells have been proposed. The 1FeFET cell exhibits the highest density but suffers from write disturbance. Although the 1T-1FeFET and 2T-1FeFET cells resolve the write disturbance, they use a write scheme with a negative write voltage (<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {W}}$ </tex-math></inline-formula>), which requires voltage swings of many control signals, leading to a significantly high write energy consumption. The 3T-1FeFET cell uses a write scheme without a negative <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {W}}$ </tex-math></inline-formula>; however, it exhibits the largest area overhead. Although the 1T-1FeFET cell resolves the write disturbance with a small area overhead; however, it exhibits high write energy consumption because of the use of a negative <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {W}}$ </tex-math></inline-formula>. In this paper, to significantly reduce the write energy consumption, we propose a less control signal swing (LCSS) write scheme without using a negative <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {W}}$ </tex-math></inline-formula>. Simulation results indicate that the worst, average, and best cases of the proposed LCSS write scheme can achieve 35%, 66%, and 96% lower write energy consumption, respectively, than the write scheme with a negative <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {W}}$ </tex-math></inline-formula> in the 1T-1FeFET cell. We also identify the available sensing schemes for each FeFET cell in the read operation according to the FeFET threshold voltage distribution.
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