A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications

A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications

Radiation can affect the correct behavior of an electronic device. Hence, the microprocessors used for space missions need to be protected against fault. TMR (Triple modular redundancy) is used for mitigating various kinds of faults in an electronic circuit. Although TMR provides an excellent level...

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Bibliographic Details
Main Authors: Satyam Shukla, Kailash Chandra Ray
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Reconfigurable VLSI architectures
fault-tolerant processor
FPGA implementation
RISC-V ISA
single event upset
Online Access:https://ieeexplore.ieee.org/document/9761919/

Internet

https://ieeexplore.ieee.org/document/9761919/

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