New High-Speed Arithmetic Circuits Based on Spiking Neural P Systems with Communication on Request Implemented in a Low-Area FPGA

During the last years, the demand for internet-of-things (IoT) resource-constrained devices has grown exponentially. To address this need, several digital methods have been proposed to improve these devices in terms of area and power consumption. Despite achieving significant results, improvement in...

詳細記述

書誌詳細
主要な著者: José Rangel, Esteban Anides, Eduardo Vázquez, Giovanny Sanchez, Juan-Gerardo Avalos, Gonzalo Duchen, Linda K. Toscano
フォーマット: 論文
言語:English
出版事項: MDPI AG 2024-11-01
シリーズ:Mathematics
主題:
オンライン・アクセス:https://www.mdpi.com/2227-7390/12/22/3472