Domain Specific Abstractions for the Development of Fast-by-Construction Dataflow Codes on FPGAs
FPGAs are popular in many fields but have yet to gain wide acceptance for accelerating HPC codes. A major cause is that whilst the growth of High-Level Synthesis (HLS), enabling the use of C or C++, has increased accessibility, without widespread algorithmic changes these tools only provide correct-...
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| Format: | Article |
| Language: | English |
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MDPI AG
2024-10-01
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| Series: | Chips |
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| Online Access: | https://www.mdpi.com/2674-0729/3/4/17 |