Modelling localized charge-injection region of the p-channel low-temperature polycrystalline silicon thin-film transistor
The low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) is the optimal device for the backplane of the organic light-emitting diode display. At the end the p-channel LTPS TFT fabrication, a charge-injection stress with a strong negative drain bias and a positive gate bias are a...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Taylor & Francis Group
2018-01-01
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| Series: | Journal of Information Display |
| Subjects: | |
| Online Access: | http://dx.doi.org/10.1080/15980316.2017.1417922 |