Resource-Efficient Image Buffer Architecture for Neighborhood Processors

Resource-Efficient Image Buffer Architecture for Neighborhood Processors

Neighborhood image processing operations on Field Programmable Gate Array (FPGA) are considered as memory intensive operations. A large memory bandwidth is required to transfer the required pixel data from external memory to the processing unit. On-chip image buffers are employed to reduce this data...

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Bibliographic Details
Main Authors: Majida Kazmi, Arshad Aziz, Hashim Raza Khan, Saad Ahmed Qazi, Lampros K. Stergioulas
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Image buffering
neighbourhood operations
FPGA
embedded block RAM (BRAM)
memory accessing technique
resource constrained applications
Online Access:https://ieeexplore.ieee.org/document/9201286/

Internet

https://ieeexplore.ieee.org/document/9201286/

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